Apparatuses, devices, and articles of manufacture consistent with the present disclosure relate to a read margin control circuit, a memory controller including the same, and an electronic device, and more particularly, relate to a read margin control circuit determining a data valid window, a memory controller including the same, and an electronic device.
A memory device may process a command transmitted from a memory controller based on a clock. The memory device may output a data input/output signal and a data strobe signal in response to a read command of the memory controller. After issuing the read command, the memory controller may sample the data input/output signal based on the data strobe signal.
A sampling point may be placed in the center of the data valid window of the data input/output signal through training between the memory controller and the memory device. However, if operating conditions such as voltage and temperature change, the data input/output signal or the data strobe signal output from the memory device may be shifted, and thus, the sampling point may not be placed in the center of the data valid window. The memory controller cannot access the memory device while the sampling point is adjusted. Accordingly, there is a need to shorten a time taken to adjust the sampling point.